Parallel Conflict-Free Ordered Access Memory Based Programmable Hardware Accelerator Structure
Rozdział w recenzowanej książce naukowejWspółautorzy: Anatoliy Melnyk
Miejsce: Ceske Budejovice, Czech Republic
Rok wydania: 2019
Tytuł publikacji: 9th International Conference “Advanced Computer Information Technologies” (ACIT'2019)
Strony od-do: 179-182
Streszczenie: Programmable hardware accelerator structure and information processing method based on a new model of computation with parallel conflict-free ordered data and command access is proposed in a paper. The advantages of the proposed hardware accelerator structure over traditional ones are highlighted.
Słowa kluczowe: programmable hardware accelerator , parallel architecture , ordered access memory model of computation , high-performance computing
Dostęp WWW: https://ieeexplore.ieee.org/document/8779928
DOI: 10.1109/ACITT.2019.8779928